forked from I2P_Developers/i2p.i2p
CPUID:
- Fix model and family calculation - Fix most AMD family 15 IDs - Add AMD Llano, Jaguar, Bulldozer 2 - Add Intel Ivy Bridge, Haswell, Broadwell, Penryn, Pineview, Cedarview, Bay Trail, Avoton, and others - Set best-guess capabilities for most Intel processors - Supply best-guess model string in most cases - Processors listed above, and some others, may see crypto speedups as a result - Code cleanup, reduce number of JNI calls - Merge dup cases - Tab removal - Javadocs
This commit is contained in:
@ -2,21 +2,24 @@ package freenet.support.CPUInformation;
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/**
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/**
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* Moved out of CPUID.java
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* Moved out of CPUID.java
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*
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* Ref: http://en.wikipedia.org/wiki/List_of_AMD_CPU_microarchitectures
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*
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* @since 0.8.7
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* @since 0.8.7
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*/
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*/
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class AMDInfoImpl extends CPUIDCPUInfo implements AMDCPUInfo
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class AMDInfoImpl extends CPUIDCPUInfo implements AMDCPUInfo
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{
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{
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protected static boolean isK6Compatible = false;
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private static boolean isK6Compatible;
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protected static boolean isK6_2_Compatible = false;
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private static boolean isK6_2_Compatible;
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protected static boolean isK6_3_Compatible = false;
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private static boolean isK6_3_Compatible;
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protected static boolean isGeodeCompatible = false;
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private static boolean isGeodeCompatible;
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protected static boolean isAthlonCompatible = false;
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private static boolean isAthlonCompatible;
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protected static boolean isAthlon64Compatible = false;
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private static boolean isAthlon64Compatible;
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protected static boolean isBobcatCompatible = false;
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private static boolean isBobcatCompatible;
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protected static boolean isBulldozerCompatible = false;
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private static boolean isBulldozerCompatible;
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// If modelString != null, the cpu is considered correctly identified.
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// If modelString != null, the cpu is considered correctly identified.
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protected static String modelString = null;
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private static final String smodel = identifyCPU();
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public boolean IsK6Compatible(){ return isK6Compatible; }
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public boolean IsK6Compatible(){ return isK6Compatible; }
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@ -32,28 +35,32 @@ class AMDInfoImpl extends CPUIDCPUInfo implements AMDCPUInfo
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public boolean IsBobcatCompatible(){ return isBobcatCompatible; }
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public boolean IsBobcatCompatible(){ return isBobcatCompatible; }
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public boolean IsBulldozerCompatible(){ return isBulldozerCompatible; }
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public boolean IsBulldozerCompatible(){ return isBulldozerCompatible; }
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static
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{
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identifyCPU();
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}
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public String getCPUModelString() throws UnknownCPUException
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public String getCPUModelString() throws UnknownCPUException
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{
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{
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if (modelString != null)
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if (smodel != null)
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return modelString;
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return smodel;
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throw new UnknownCPUException("Unknown AMD CPU; Family="+(CPUID.getCPUFamily() + CPUID.getCPUExtendedFamily())+", Model="+(CPUID.getCPUModel() + CPUID.getCPUExtendedModel()));
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throw new UnknownCPUException("Unknown AMD CPU; Family="+CPUID.getCPUFamily() + '/' + CPUID.getCPUExtendedFamily()+
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", Model="+CPUID.getCPUModel() + '/' + CPUID.getCPUExtendedModel());
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}
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}
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private synchronized static void identifyCPU()
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private static String identifyCPU()
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{
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{
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//AMD-family = getCPUFamily()+getCPUExtendedFamily()
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// http://en.wikipedia.org/wiki/Cpuid
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//AMD-model = getCPUModel()+getCPUExtendedModel()
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String modelString = null;
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//i486 class (Am486, 5x86)
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int family = CPUID.getCPUFamily();
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if(CPUID.getCPUFamily() + CPUID.getCPUExtendedFamily() == 4){
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int model = CPUID.getCPUModel();
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switch(CPUID.getCPUModel() + CPUID.getCPUExtendedModel()){
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if (family == 15) {
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family += CPUID.getCPUExtendedFamily();
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model += CPUID.getCPUExtendedModel() << 4;
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}
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switch (family) {
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//i486 class (Am486, 5x86)
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case 4: {
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switch (model) {
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case 3:
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case 3:
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modelString = "486 DX/2";
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modelString = "486 DX/2";
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break;
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break;
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@ -72,37 +79,37 @@ class AMDInfoImpl extends CPUIDCPUInfo implements AMDCPUInfo
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case 15:
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case 15:
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modelString = "Am5x86-WB";
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modelString = "Am5x86-WB";
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break;
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break;
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default:
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modelString = "AMD 486/586 model " + model;
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break;
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}
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}
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}
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}
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break;
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//i586 class (K5/K6/K6-2/K6-III)
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//i586 class (K5/K6/K6-2/K6-III)
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if(CPUID.getCPUFamily() + CPUID.getCPUExtendedFamily() == 5){
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// ref: http://support.amd.com/TechDocs/20734.pdf
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case 5: {
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isK6Compatible = true;
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isK6Compatible = true;
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switch(CPUID.getCPUModel() + CPUID.getCPUExtendedModel()){
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switch (model) {
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case 0:
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case 0:
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modelString = "K5/SSA5";
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modelString = "K5/SSA5";
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break;
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break;
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case 1:
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case 1:
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modelString = "K5";
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break;
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case 2:
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case 2:
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modelString = "K5";
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break;
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case 3:
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case 3:
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modelString = "K5";
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modelString = "K5";
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break;
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break;
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case 4:
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case 4:
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isK6Compatible = false;
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isK6Compatible = false;
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isGeodeCompatible = true;
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isGeodeCompatible = true;
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modelString = "Geode GX1/GXLV/GXm";
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modelString = "Geode GX1/GXLV/GXm";
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break;
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case 5:
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isK6Compatible = false;
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isGeodeCompatible = true;
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modelString = "Geode GX2/LX";
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break;
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case 6:
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modelString = "K6";
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break;
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break;
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case 5:
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isK6Compatible = false;
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isGeodeCompatible = true;
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modelString = "Geode GX2/LX";
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break;
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case 6:
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case 7:
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case 7:
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modelString = "K6";
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modelString = "K6";
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break;
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break;
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@ -119,18 +126,22 @@ class AMDInfoImpl extends CPUIDCPUInfo implements AMDCPUInfo
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isK6_2_Compatible = true;
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isK6_2_Compatible = true;
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modelString = "K6-2+ or K6-III+";
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modelString = "K6-2+ or K6-III+";
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break;
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break;
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default:
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modelString = "AMD K5/K6 model " + model;
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break;
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}
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}
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}
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}
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break;
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//i686 class (Athlon/Athlon XP/Duron/K7 Sempron)
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//i686 class (Athlon/Athlon XP/Duron/K7 Sempron)
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if(CPUID.getCPUFamily() + CPUID.getCPUExtendedFamily() == 6){
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// ref: http://support.amd.com/TechDocs/20734.pdf
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case 6: {
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isK6Compatible = true;
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isK6Compatible = true;
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isK6_2_Compatible = true;
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isK6_2_Compatible = true;
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isK6_3_Compatible = true;
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isK6_3_Compatible = true;
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isAthlonCompatible = true;
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isAthlonCompatible = true;
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switch(CPUID.getCPUModel() + CPUID.getCPUExtendedModel()){
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switch (model) {
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case 0:
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case 0:
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modelString = "Athlon (250 nm)";
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break;
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case 1:
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case 1:
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modelString = "Athlon (250 nm)";
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modelString = "Athlon (250 nm)";
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break;
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break;
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@ -155,17 +166,23 @@ class AMDInfoImpl extends CPUIDCPUInfo implements AMDCPUInfo
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case 10:
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case 10:
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modelString = "Athlon (Barton)";
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modelString = "Athlon (Barton)";
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break;
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break;
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default:
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modelString = "AMD Athlon/Duron model " + model;
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break;
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}
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}
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}
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}
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break;
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//AMD64 class (A64/Opteron/A64 X2/K8 Sempron/Turion/Second-Generation Opteron/Athlon Neo)
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//AMD64 class (A64/Opteron/A64 X2/K8 Sempron/Turion/Second-Generation Opteron/Athlon Neo)
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if(CPUID.getCPUFamily() + CPUID.getCPUExtendedFamily() == 15){
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// ref: http://support.amd.com/TechDocs/33610.PDF
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case 15: {
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isK6Compatible = true;
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isK6Compatible = true;
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isK6_2_Compatible = true;
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isK6_2_Compatible = true;
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isK6_3_Compatible = true;
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isK6_3_Compatible = true;
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isAthlonCompatible = true;
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isAthlonCompatible = true;
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isAthlon64Compatible = true;
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isAthlon64Compatible = true;
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isX64 = true;
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isX64 = true;
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switch(CPUID.getCPUModel() + CPUID.getCPUExtendedModel()){
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switch (model) {
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case 4:
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case 4:
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modelString = "Athlon 64/Mobile XP-M";
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modelString = "Athlon 64/Mobile XP-M";
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break;
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break;
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@ -182,14 +199,13 @@ class AMDInfoImpl extends CPUIDCPUInfo implements AMDCPUInfo
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modelString = "Athlon 64 (Clawhammer S939, 130 nm)";
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modelString = "Athlon 64 (Clawhammer S939, 130 nm)";
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break;
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break;
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case 12:
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case 12:
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modelString = "Athlon 64/Sempron (Newcastle S754, 130 nm)";
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break;
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case 14:
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case 14:
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modelString = "Athlon 64/Sempron (Newcastle S754, 130 nm)";
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modelString = "Athlon 64/Sempron (Newcastle S754, 130 nm)";
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break;
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break;
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case 15:
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case 15:
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modelString = "Athlon 64/Sempron (Clawhammer S939, 130 nm)";
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modelString = "Athlon 64/Sempron (Clawhammer S939, 130 nm)";
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break;
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break;
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// everything below here was broken prior to 0.9.16
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case 18:
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case 18:
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modelString = "Sempron (Palermo, 90 nm)";
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modelString = "Sempron (Palermo, 90 nm)";
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break;
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break;
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@ -283,20 +299,22 @@ class AMDInfoImpl extends CPUIDCPUInfo implements AMDCPUInfo
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case 193:
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case 193:
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modelString = "Athlon 64 FX (Windsor S1207 90 nm)";
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modelString = "Athlon 64 FX (Windsor S1207 90 nm)";
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break;
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break;
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default: // is this safe?
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default:
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modelString = "Athlon 64 (unknown)";
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modelString = "AMD Athlon/Duron/Sempron model " + model;
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break;
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break;
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}
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}
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}
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}
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break;
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//Stars (Phenom II/Athlon II/Third-Generation Opteron/Opteron 4100 & 6100/Sempron 1xx)
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//Stars (Phenom II/Athlon II/Third-Generation Opteron/Opteron 4100 & 6100/Sempron 1xx)
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if(CPUID.getCPUFamily() + CPUID.getCPUExtendedFamily() == 16){
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case 16: {
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isK6Compatible = true;
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isK6Compatible = true;
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isK6_2_Compatible = true;
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isK6_2_Compatible = true;
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isK6_3_Compatible = true;
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isK6_3_Compatible = true;
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isAthlonCompatible = true;
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isAthlonCompatible = true;
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isAthlon64Compatible = true;
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isAthlon64Compatible = true;
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isX64 = true;
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isX64 = true;
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switch(CPUID.getCPUModel() + CPUID.getCPUExtendedModel()){
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switch (model) {
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case 2:
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case 2:
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modelString = "Phenom / Athlon / Opteron Gen 3 (Barcelona/Agena/Toliman/Kuma, 65 nm)";
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modelString = "Phenom / Athlon / Opteron Gen 3 (Barcelona/Agena/Toliman/Kuma, 65 nm)";
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break;
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break;
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@ -318,24 +336,47 @@ class AMDInfoImpl extends CPUIDCPUInfo implements AMDCPUInfo
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case 10:
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case 10:
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modelString = "Phenom II X4/X6 (Zosma/Thuban AM3, 45 nm)";
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modelString = "Phenom II X4/X6 (Zosma/Thuban AM3, 45 nm)";
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break;
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break;
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default:
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modelString = "AMD Athlon/Opteron model " + model;
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break;
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}
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}
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}
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}
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break;
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//K8 mobile+HT3 (Turion X2/Athlon X2/Sempron)
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//K8 mobile+HT3 (Turion X2/Athlon X2/Sempron)
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if(CPUID.getCPUFamily() + CPUID.getCPUExtendedFamily() == 17){
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case 17: {
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isK6Compatible = true;
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isK6Compatible = true;
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isK6_2_Compatible = true;
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isK6_2_Compatible = true;
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isK6_3_Compatible = true;
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isK6_3_Compatible = true;
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isAthlonCompatible = true;
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isAthlonCompatible = true;
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isAthlon64Compatible = true;
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isAthlon64Compatible = true;
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isX64 = true;
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isX64 = true;
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switch(CPUID.getCPUModel() + CPUID.getCPUExtendedModel()){
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switch (model) {
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case 3:
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case 3:
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modelString = "AMD Turion X2/Athlon X2/Sempron (Lion/Sable, 65 nm)";
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modelString = "AMD Turion X2/Athlon X2/Sempron (Lion/Sable, 65 nm)";
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break;
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break;
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default:
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modelString = "AMD Athlon/Turion/Sempron model " + model;
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break;
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}
|
}
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}
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}
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break;
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// APUs
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// http://en.wikipedia.org/wiki/List_of_AMD_Accelerated_Processing_Unit_microprocessors
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case 18: {
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isK6Compatible = true;
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isK6_2_Compatible = true;
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isK6_3_Compatible = true;
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isAthlonCompatible = true;
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isAthlon64Compatible = true;
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isX64 = true;
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modelString = "AMD Llano/Trinity/Brazos model " + model;
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|
}
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break;
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//Bobcat
|
//Bobcat
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if(CPUID.getCPUFamily() + CPUID.getCPUExtendedFamily() == 20){
|
case 20: {
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isK6Compatible = true;
|
isK6Compatible = true;
|
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isK6_2_Compatible = true;
|
isK6_2_Compatible = true;
|
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isK6_3_Compatible = true;
|
isK6_3_Compatible = true;
|
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@ -343,37 +384,59 @@ class AMDInfoImpl extends CPUIDCPUInfo implements AMDCPUInfo
|
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isAthlon64Compatible = true;
|
isAthlon64Compatible = true;
|
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isBobcatCompatible = true;
|
isBobcatCompatible = true;
|
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isX64 = true;
|
isX64 = true;
|
||||||
switch(CPUID.getCPUModel() + CPUID.getCPUExtendedModel()){
|
switch (model) {
|
||||||
case 1:
|
case 1:
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modelString = "Bobcat APU";
|
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break;
|
|
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// Case 3 is uncertain but most likely a Bobcat APU
|
// Case 3 is uncertain but most likely a Bobcat APU
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case 3:
|
case 3:
|
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modelString = "Bobcat APU";
|
modelString = "Bobcat APU";
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break;
|
break;
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||||||
|
default:
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|
modelString = "AMD Bobcat model " + model;
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||||||
|
break;
|
||||||
}
|
}
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}
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}
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||||||
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break;
|
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|
|
||||||
//Bulldozer
|
//Bulldozer
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if(CPUID.getCPUFamily() + CPUID.getCPUExtendedFamily() == 21){
|
case 21: {
|
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isK6Compatible = true;
|
isK6Compatible = true;
|
||||||
isK6_2_Compatible = true;
|
isK6_2_Compatible = true;
|
||||||
isK6_3_Compatible = true;
|
isK6_3_Compatible = true;
|
||||||
isAthlonCompatible = true;
|
isAthlonCompatible = true;
|
||||||
isAthlon64Compatible = true;
|
isAthlon64Compatible = true;
|
||||||
isBobcatCompatible = true;
|
isBobcatCompatible = true;
|
||||||
isBulldozerCompatible = true;
|
isBulldozerCompatible = true;
|
||||||
isX64 = true;
|
isX64 = true;
|
||||||
switch(CPUID.getCPUModel() + CPUID.getCPUExtendedModel()){
|
switch (model) {
|
||||||
case 1:
|
case 1:
|
||||||
modelString = "Bulldozer FX-6***/FX-8***";
|
modelString = "Bulldozer FX-6000/8000";
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
modelString = "AMD Bulldozer model " + model;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
//Jaguar
|
||||||
|
case 22: {
|
||||||
|
isK6Compatible = true;
|
||||||
|
isK6_2_Compatible = true;
|
||||||
|
isK6_3_Compatible = true;
|
||||||
|
isAthlonCompatible = true;
|
||||||
|
isAthlon64Compatible = true;
|
||||||
|
isBobcatCompatible = true;
|
||||||
|
isX64 = true;
|
||||||
|
modelString = "AMD Jaguar model " + model;
|
||||||
|
}
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
|
return modelString;
|
||||||
}
|
}
|
||||||
|
|
||||||
public boolean hasX64()
|
public boolean hasX64()
|
||||||
{
|
{
|
||||||
return isX64;
|
return isX64;
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
@ -24,8 +24,8 @@ import net.i2p.util.SystemVersion;
|
|||||||
|
|
||||||
/**
|
/**
|
||||||
* A class for retrieveing details about the CPU using the CPUID assembly instruction.
|
* A class for retrieveing details about the CPU using the CPUID assembly instruction.
|
||||||
* A good resource for information about the CPUID instruction can be found here:
|
*
|
||||||
* http://www.paradicesoftware.com/specs/cpuid/index.htm
|
* Ref: http://en.wikipedia.org/wiki/Cpuid
|
||||||
*
|
*
|
||||||
* @author Iakin
|
* @author Iakin
|
||||||
*/
|
*/
|
||||||
@ -124,51 +124,75 @@ public class CPUID {
|
|||||||
|
|
||||||
return sb.toString();
|
return sb.toString();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/** @return 0-15 */
|
||||||
static int getCPUFamily()
|
static int getCPUFamily()
|
||||||
{
|
{
|
||||||
CPUIDResult c = doCPUID(1);
|
CPUIDResult c = doCPUID(1);
|
||||||
return (c.EAX >> 8) & 0xf;
|
return (c.EAX >> 8) & 0xf;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/** @return 0-15 */
|
||||||
static int getCPUModel()
|
static int getCPUModel()
|
||||||
{
|
{
|
||||||
CPUIDResult c = doCPUID(1);
|
CPUIDResult c = doCPUID(1);
|
||||||
return (c.EAX >> 4) & 0xf;
|
return (c.EAX >> 4) & 0xf;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Only valid if family == 15.
|
||||||
|
* Left shift by 4 and then add model to get full model.
|
||||||
|
* @return 0-15
|
||||||
|
*/
|
||||||
static int getCPUExtendedModel()
|
static int getCPUExtendedModel()
|
||||||
{
|
{
|
||||||
CPUIDResult c = doCPUID(1);
|
CPUIDResult c = doCPUID(1);
|
||||||
return (c.EAX >> 16) & 0xf;
|
return (c.EAX >> 16) & 0xf;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/** @return 0-15 */
|
||||||
static int getCPUType()
|
static int getCPUType()
|
||||||
{
|
{
|
||||||
CPUIDResult c = doCPUID(1);
|
CPUIDResult c = doCPUID(1);
|
||||||
return (c.EAX >> 12) & 0xf;
|
return (c.EAX >> 12) & 0xf;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Only valid if family == 15.
|
||||||
|
* Add family to get full family.
|
||||||
|
* @return 0-255
|
||||||
|
*/
|
||||||
static int getCPUExtendedFamily()
|
static int getCPUExtendedFamily()
|
||||||
{
|
{
|
||||||
CPUIDResult c = doCPUID(1);
|
CPUIDResult c = doCPUID(1);
|
||||||
return (c.EAX >> 20) & 0xff;
|
return (c.EAX >> 20) & 0xff;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/** @return 0-15 */
|
||||||
static int getCPUStepping()
|
static int getCPUStepping()
|
||||||
{
|
{
|
||||||
CPUIDResult c = doCPUID(1);
|
CPUIDResult c = doCPUID(1);
|
||||||
return c.EAX & 0xf;
|
return c.EAX & 0xf;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int getEDXCPUFlags()
|
static int getEDXCPUFlags()
|
||||||
{
|
{
|
||||||
CPUIDResult c = doCPUID(1);
|
CPUIDResult c = doCPUID(1);
|
||||||
return c.EDX;
|
return c.EDX;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int getECXCPUFlags()
|
static int getECXCPUFlags()
|
||||||
{
|
{
|
||||||
CPUIDResult c = doCPUID(1);
|
CPUIDResult c = doCPUID(1);
|
||||||
return c.ECX;
|
return c.ECX;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int getExtendedEBXCPUFlags()
|
static int getExtendedEBXCPUFlags()
|
||||||
{
|
{
|
||||||
CPUIDResult c = doCPUID(0x80000001);
|
CPUIDResult c = doCPUID(0x80000001);
|
||||||
return c.EBX;
|
return c.EBX;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int getExtendedECXCPUFlags()
|
static int getExtendedECXCPUFlags()
|
||||||
{
|
{
|
||||||
CPUIDResult c = doCPUID(0x80000001);
|
CPUIDResult c = doCPUID(0x80000001);
|
||||||
|
@ -45,11 +45,16 @@ public interface IntelCPUInfo extends CPUInfo {
|
|||||||
* @return true if the CPU implements at least a Atom level instruction/feature set.
|
* @return true if the CPU implements at least a Atom level instruction/feature set.
|
||||||
*/
|
*/
|
||||||
public boolean IsAtomCompatible();
|
public boolean IsAtomCompatible();
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
* Supports the SSE 3 instructions.
|
||||||
* @return true if the CPU implements at least a Core2 level instruction/feature set.
|
* @return true if the CPU implements at least a Core2 level instruction/feature set.
|
||||||
*/
|
*/
|
||||||
public boolean IsCore2Compatible();
|
public boolean IsCore2Compatible();
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
* Supports the SSE 3, 4.1, 4.2 instructions.
|
||||||
|
* In general, this requires 45nm or smaller process.
|
||||||
* @return true if the CPU implements at least a Corei level instruction/feature set.
|
* @return true if the CPU implements at least a Corei level instruction/feature set.
|
||||||
*/
|
*/
|
||||||
public boolean IsCoreiCompatible();
|
public boolean IsCoreiCompatible();
|
||||||
|
@ -2,22 +2,26 @@ package freenet.support.CPUInformation;
|
|||||||
|
|
||||||
/**
|
/**
|
||||||
* Moved out of CPUID.java
|
* Moved out of CPUID.java
|
||||||
|
*
|
||||||
|
* Ref: https://software.intel.com/en-us/articles/intel-architecture-and-processor-identification-with-cpuid-model-and-family-numbers
|
||||||
|
* Ref: http://en.wikipedia.org/wiki/List_of_Intel_CPU_microarchitectures
|
||||||
|
*
|
||||||
* @since 0.8.7
|
* @since 0.8.7
|
||||||
*/
|
*/
|
||||||
class IntelInfoImpl extends CPUIDCPUInfo implements IntelCPUInfo
|
class IntelInfoImpl extends CPUIDCPUInfo implements IntelCPUInfo
|
||||||
{
|
{
|
||||||
protected static boolean isPentiumCompatible = false;
|
private static boolean isPentiumCompatible;
|
||||||
protected static boolean isPentiumMMXCompatible = false;
|
private static boolean isPentiumMMXCompatible;
|
||||||
protected static boolean isPentium2Compatible = false;
|
private static boolean isPentium2Compatible;
|
||||||
protected static boolean isPentium3Compatible = false;
|
private static boolean isPentium3Compatible;
|
||||||
protected static boolean isPentium4Compatible = false;
|
private static boolean isPentium4Compatible;
|
||||||
protected static boolean isPentiumMCompatible = false;
|
private static boolean isPentiumMCompatible;
|
||||||
protected static boolean isAtomCompatible = false;
|
private static boolean isAtomCompatible;
|
||||||
protected static boolean isCore2Compatible = false;
|
private static boolean isCore2Compatible;
|
||||||
protected static boolean isCoreiCompatible = false;
|
private static boolean isCoreiCompatible;
|
||||||
|
|
||||||
// If modelString != null, the cpu is considered correctly identified.
|
// If modelString != null, the cpu is considered correctly identified.
|
||||||
protected static String modelString = null;
|
private static final String smodel = identifyCPU();
|
||||||
|
|
||||||
public boolean IsPentiumCompatible(){ return isPentiumCompatible; }
|
public boolean IsPentiumCompatible(){ return isPentiumCompatible; }
|
||||||
|
|
||||||
@ -33,27 +37,39 @@ class IntelInfoImpl extends CPUIDCPUInfo implements IntelCPUInfo
|
|||||||
|
|
||||||
public boolean IsAtomCompatible(){ return isAtomCompatible; }
|
public boolean IsAtomCompatible(){ return isAtomCompatible; }
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Supports the SSE 3 instructions
|
||||||
|
*/
|
||||||
public boolean IsCore2Compatible(){ return isCore2Compatible; }
|
public boolean IsCore2Compatible(){ return isCore2Compatible; }
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Supports the SSE 3, 4.1, 4.2 instructions.
|
||||||
|
* In general, this requires 45nm or smaller process.
|
||||||
|
*/
|
||||||
public boolean IsCoreiCompatible(){ return isCoreiCompatible; }
|
public boolean IsCoreiCompatible(){ return isCoreiCompatible; }
|
||||||
|
|
||||||
static
|
|
||||||
{
|
|
||||||
identifyCPU();
|
|
||||||
}
|
|
||||||
|
|
||||||
public String getCPUModelString() throws UnknownCPUException
|
public String getCPUModelString() throws UnknownCPUException
|
||||||
{
|
{
|
||||||
if (modelString != null)
|
if (smodel != null)
|
||||||
return modelString;
|
return smodel;
|
||||||
throw new UnknownCPUException("Unknown Intel CPU; Family="+CPUID.getCPUFamily()+", Model="+CPUID.getCPUModel());
|
throw new UnknownCPUException("Unknown Intel CPU; Family="+CPUID.getCPUFamily() + '/' + CPUID.getCPUExtendedFamily()+
|
||||||
|
", Model="+CPUID.getCPUModel() + '/' + CPUID.getCPUExtendedModel());
|
||||||
}
|
}
|
||||||
|
|
||||||
private synchronized static void identifyCPU()
|
private static String identifyCPU()
|
||||||
{
|
{
|
||||||
if (CPUID.getCPUExtendedModel() == 0){
|
// http://en.wikipedia.org/wiki/Cpuid
|
||||||
if(CPUID.getCPUFamily() == 4){
|
String modelString = null;
|
||||||
switch(CPUID.getCPUModel()){
|
int family = CPUID.getCPUFamily();
|
||||||
|
int model = CPUID.getCPUModel();
|
||||||
|
if (family == 15) {
|
||||||
|
family += CPUID.getCPUExtendedFamily();
|
||||||
|
model += CPUID.getCPUExtendedModel() << 4;
|
||||||
|
}
|
||||||
|
|
||||||
|
switch (family) {
|
||||||
|
case 4: {
|
||||||
|
switch (model) {
|
||||||
case 0:
|
case 0:
|
||||||
modelString = "486 DX-25/33";
|
modelString = "486 DX-25/33";
|
||||||
break;
|
break;
|
||||||
@ -81,13 +97,17 @@ class IntelInfoImpl extends CPUIDCPUInfo implements IntelCPUInfo
|
|||||||
case 9:
|
case 9:
|
||||||
modelString = "486 DX/4-WB";
|
modelString = "486 DX/4-WB";
|
||||||
break;
|
break;
|
||||||
|
default:
|
||||||
|
modelString = "Intel 486/586 model " + model;
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
break;
|
||||||
if (CPUID.getCPUExtendedModel() == 0){
|
|
||||||
if(CPUID.getCPUFamily() == 5){
|
// P5
|
||||||
|
case 5: {
|
||||||
isPentiumCompatible = true;
|
isPentiumCompatible = true;
|
||||||
switch(CPUID.getCPUModel()){
|
switch (model) {
|
||||||
case 0:
|
case 0:
|
||||||
modelString = "Pentium 60/66 A-step";
|
modelString = "Pentium 60/66 A-step";
|
||||||
break;
|
break;
|
||||||
@ -111,14 +131,29 @@ class IntelInfoImpl extends CPUIDCPUInfo implements IntelCPUInfo
|
|||||||
isPentiumMMXCompatible = true;
|
isPentiumMMXCompatible = true;
|
||||||
modelString = "Mobile Pentium MMX";
|
modelString = "Mobile Pentium MMX";
|
||||||
break;
|
break;
|
||||||
|
default:
|
||||||
|
modelString = "Intel Pentium model " + model;
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
break;
|
||||||
if(CPUID.getCPUFamily() == 6){
|
|
||||||
if (CPUID.getCPUExtendedModel() == 0){
|
// P6
|
||||||
|
case 6: {
|
||||||
isPentiumCompatible = true;
|
isPentiumCompatible = true;
|
||||||
isPentiumMMXCompatible = true;
|
isPentiumMMXCompatible = true;
|
||||||
switch(CPUID.getCPUModel()){
|
int extmodel = model >> 4;
|
||||||
|
if (extmodel >= 1) {
|
||||||
|
isPentium2Compatible = true;
|
||||||
|
isPentium3Compatible = true;
|
||||||
|
isPentium4Compatible = true;
|
||||||
|
isPentiumMCompatible = true;
|
||||||
|
isCore2Compatible = true;
|
||||||
|
isX64 = true;
|
||||||
|
if (extmodel >= 2)
|
||||||
|
isCoreiCompatible = true;
|
||||||
|
}
|
||||||
|
switch (model) {
|
||||||
case 0:
|
case 0:
|
||||||
modelString = "Pentium Pro A-step";
|
modelString = "Pentium Pro A-step";
|
||||||
break;
|
break;
|
||||||
@ -150,7 +185,7 @@ class IntelInfoImpl extends CPUIDCPUInfo implements IntelCPUInfo
|
|||||||
case 9:
|
case 9:
|
||||||
isPentium2Compatible = true;
|
isPentium2Compatible = true;
|
||||||
isPentium3Compatible = true;
|
isPentium3Compatible = true;
|
||||||
isPentiumMCompatible = true;
|
isPentiumMCompatible = true;
|
||||||
isX64 = true;
|
isX64 = true;
|
||||||
modelString = "Pentium M (Banias)";
|
modelString = "Pentium M (Banias)";
|
||||||
break;
|
break;
|
||||||
@ -167,111 +202,154 @@ class IntelInfoImpl extends CPUIDCPUInfo implements IntelCPUInfo
|
|||||||
case 13:
|
case 13:
|
||||||
isPentium2Compatible = true;
|
isPentium2Compatible = true;
|
||||||
isPentium3Compatible = true;
|
isPentium3Compatible = true;
|
||||||
isPentiumMCompatible = true;
|
isPentiumMCompatible = true;
|
||||||
isX64 = true;
|
isX64 = true;
|
||||||
modelString = "Core (Yonah)";
|
modelString = "Core (Yonah)";
|
||||||
break;
|
break;
|
||||||
case 14:
|
case 14:
|
||||||
isPentium2Compatible = true;
|
|
||||||
isPentium3Compatible = true;
|
|
||||||
isPentiumMCompatible = true;
|
|
||||||
isCore2Compatible = true;
|
|
||||||
isX64 = true;
|
|
||||||
modelString = "Core 2 (Conroe)";
|
|
||||||
break;
|
|
||||||
case 15:
|
case 15:
|
||||||
isPentium2Compatible = true;
|
isPentium2Compatible = true;
|
||||||
isPentium3Compatible = true;
|
isPentium3Compatible = true;
|
||||||
isPentiumMCompatible = true;
|
isPentiumMCompatible = true;
|
||||||
isCore2Compatible = true;
|
isCore2Compatible = true;
|
||||||
isX64 = true;
|
isX64 = true;
|
||||||
modelString = "Core 2 (Conroe)";
|
modelString = "Core 2 (Conroe)";
|
||||||
break;
|
break;
|
||||||
}
|
|
||||||
} else if (CPUID.getCPUExtendedModel() == 1){
|
// following are for extended model == 1
|
||||||
isPentiumCompatible = true;
|
// most flags are set above
|
||||||
isPentiumMMXCompatible = true;
|
|
||||||
isPentium2Compatible = true;
|
// Celeron 65 nm
|
||||||
isPentium3Compatible = true;
|
case 0x16:
|
||||||
isPentium4Compatible = true;
|
|
||||||
isPentiumMCompatible = true;
|
|
||||||
isCore2Compatible = true;
|
|
||||||
isX64 = true;
|
|
||||||
switch(CPUID.getCPUModel()){
|
|
||||||
case 6:
|
|
||||||
modelString = "Celeron";
|
modelString = "Celeron";
|
||||||
break;
|
break;
|
||||||
case 10:
|
// Penryn 45 nm
|
||||||
isCoreiCompatible = true;
|
case 0x17:
|
||||||
modelString = "Core i7 (45nm)";
|
modelString = "Core 2 (45nm)";
|
||||||
break;
|
break;
|
||||||
case 12:
|
// Nahalem 45 nm
|
||||||
|
case 0x1a:
|
||||||
|
isCoreiCompatible = true;
|
||||||
|
modelString = "Core i7 (45nm)";
|
||||||
|
break;
|
||||||
|
// Atom Pineview / Silverthorne 45 nm
|
||||||
|
case 0x1c:
|
||||||
isAtomCompatible = true;
|
isAtomCompatible = true;
|
||||||
|
// Some support SSE3? true for Pineview? TBD...
|
||||||
isCore2Compatible = false;
|
isCore2Compatible = false;
|
||||||
isPentium4Compatible = false;
|
isPentium4Compatible = false;
|
||||||
isX64 = true;
|
isX64 = true;
|
||||||
modelString = "Atom";
|
modelString = "Atom";
|
||||||
break;
|
break;
|
||||||
case 13:
|
// Penryn 45 nm
|
||||||
|
case 0x1d:
|
||||||
isCoreiCompatible = true;
|
isCoreiCompatible = true;
|
||||||
modelString = "Xeon MP (45nm)";
|
modelString = "Xeon MP (45nm)";
|
||||||
break;
|
break;
|
||||||
case 14:
|
// Nahalem 45 nm
|
||||||
|
case 0x1e:
|
||||||
isCoreiCompatible = true;
|
isCoreiCompatible = true;
|
||||||
modelString = "Core i5/i7 (45nm)";
|
modelString = "Core i5/i7 (45nm)";
|
||||||
break;
|
break;
|
||||||
}
|
|
||||||
} else if (CPUID.getCPUExtendedModel() == 2){
|
// following are for extended model == 2
|
||||||
isPentiumCompatible = true;
|
// most flags are set above
|
||||||
isPentiumMMXCompatible = true;
|
// isCoreiCompatible = true is the default
|
||||||
isPentium2Compatible = true;
|
|
||||||
isPentium3Compatible = true;
|
// Westmere 32 nm
|
||||||
isPentium4Compatible = true;
|
case 0x25:
|
||||||
isPentiumMCompatible = true;
|
|
||||||
isCore2Compatible = true;
|
|
||||||
isCoreiCompatible = true;
|
|
||||||
isX64 = true;
|
|
||||||
switch(CPUID.getCPUModel()){
|
|
||||||
case 5:
|
|
||||||
modelString = "Core i3 or i5/i7 mobile (32nm)";
|
modelString = "Core i3 or i5/i7 mobile (32nm)";
|
||||||
break;
|
break;
|
||||||
case 10:
|
// Atom Lincroft 45 nm
|
||||||
|
case 0x26:
|
||||||
|
isAtomCompatible = true;
|
||||||
|
// Supports SSE 3
|
||||||
|
isCoreiCompatible = false;
|
||||||
|
modelString = "Atom Z600";
|
||||||
|
break;
|
||||||
|
// Sandy bridge 32 nm
|
||||||
|
case 0x2a:
|
||||||
|
modelString = "Sandy Bridge H/M";
|
||||||
|
break;
|
||||||
|
case 0x2b:
|
||||||
modelString = "Core i7/i5 (32nm)";
|
modelString = "Core i7/i5 (32nm)";
|
||||||
break;
|
break;
|
||||||
case 11:
|
// Westmere
|
||||||
modelString = "Core i7/i5 (32nm)";
|
case 0x2c:
|
||||||
break;
|
|
||||||
case 12:
|
|
||||||
modelString = "Core i7 (32nm)";
|
modelString = "Core i7 (32nm)";
|
||||||
break;
|
break;
|
||||||
case 13:
|
// Sandy bridge 32 nm
|
||||||
modelString = "Core i7 Extreme Edition (32nm)";
|
case 0x2d:
|
||||||
|
modelString = "Sandy Bridge EP";
|
||||||
break;
|
break;
|
||||||
case 14:
|
// Nahalem 45 nm
|
||||||
|
case 0x2e:
|
||||||
modelString = "Xeon MP (45nm)";
|
modelString = "Xeon MP (45nm)";
|
||||||
break;
|
break;
|
||||||
case 15:
|
// Westmere 32 nm
|
||||||
|
case 0x2f:
|
||||||
modelString = "Xeon MP (32nm)";
|
modelString = "Xeon MP (32nm)";
|
||||||
break;
|
break;
|
||||||
}
|
|
||||||
|
// following are for extended model == 3
|
||||||
|
// most flags are set above
|
||||||
|
// isCoreiCompatible = true is the default
|
||||||
|
|
||||||
|
// Atom Cedarview 32 nm
|
||||||
|
case 0x36:
|
||||||
|
isAtomCompatible = true;
|
||||||
|
// Supports SSE 3
|
||||||
|
isCore2Compatible = false;
|
||||||
|
modelString = "Atom N2000/D2000";
|
||||||
|
break;
|
||||||
|
// Ivy Bridge 22 nm
|
||||||
|
case 0x3a:
|
||||||
|
modelString = "Ivy Bridge";
|
||||||
|
break;
|
||||||
|
// Haswell 22 nm
|
||||||
|
case 0x3c:
|
||||||
|
modelString = "Haswell";
|
||||||
|
break;
|
||||||
|
// Broadwell 14 nm
|
||||||
|
case 0x3d:
|
||||||
|
modelString = "Broadwell";
|
||||||
|
break;
|
||||||
|
|
||||||
|
// following are for extended model == 4
|
||||||
|
// most flags are set above
|
||||||
|
// isCoreiCompatible = true is the default
|
||||||
|
|
||||||
|
// Atom Silvermont / Bay Trail / Avoton 22 nm
|
||||||
|
// Supports SSE 4.2
|
||||||
|
case 0x4d:
|
||||||
|
isAtomCompatible = true;
|
||||||
|
modelString = "Bay Trail / Avoton";
|
||||||
|
break;
|
||||||
|
|
||||||
|
// others
|
||||||
|
|
||||||
|
default:
|
||||||
|
modelString = "Intel model " + model;
|
||||||
|
break;
|
||||||
|
} // switch model
|
||||||
|
} // case 6
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 7: {
|
||||||
|
// Flags TODO
|
||||||
|
modelString = "Intel Itanium model " + model;
|
||||||
}
|
}
|
||||||
}
|
break;
|
||||||
if(CPUID.getCPUFamily() == 7){
|
|
||||||
switch(CPUID.getCPUModel()){
|
// 15 + 0
|
||||||
//Itanium.. TODO
|
case 15: {
|
||||||
}
|
|
||||||
}
|
|
||||||
if(CPUID.getCPUFamily() == 15){
|
|
||||||
if(CPUID.getCPUExtendedFamily() == 0){
|
|
||||||
isPentiumCompatible = true;
|
isPentiumCompatible = true;
|
||||||
isPentiumMMXCompatible = true;
|
isPentiumMMXCompatible = true;
|
||||||
isPentium2Compatible = true;
|
isPentium2Compatible = true;
|
||||||
isPentium3Compatible = true;
|
isPentium3Compatible = true;
|
||||||
isPentium4Compatible = true;
|
isPentium4Compatible = true;
|
||||||
switch(CPUID.getCPUModel()){
|
switch (model) {
|
||||||
case 0:
|
case 0:
|
||||||
modelString = "Pentium IV (180 nm)";
|
|
||||||
break;
|
|
||||||
case 1:
|
case 1:
|
||||||
modelString = "Pentium IV (180 nm)";
|
modelString = "Pentium IV (180 nm)";
|
||||||
break;
|
break;
|
||||||
@ -289,17 +367,23 @@ class IntelInfoImpl extends CPUIDCPUInfo implements IntelCPUInfo
|
|||||||
isX64 = true;
|
isX64 = true;
|
||||||
modelString = "Pentium IV (65 nm)";
|
modelString = "Pentium IV (65 nm)";
|
||||||
break;
|
break;
|
||||||
|
default:
|
||||||
|
modelString = "Intel Pentium IV model " + model;
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
if(CPUID.getCPUExtendedFamily() == 1){
|
break;
|
||||||
switch(CPUID.getCPUModel()){
|
|
||||||
// Itanium 2.. TODO
|
// 15 + 1
|
||||||
}
|
case 16: {
|
||||||
|
// Flags TODO
|
||||||
|
modelString = "Intel Itanium II model " + model;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
return modelString;
|
||||||
}
|
}
|
||||||
|
|
||||||
public boolean hasX64() {
|
public boolean hasX64() {
|
||||||
return isX64;
|
return isX64;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -5,65 +5,73 @@ package freenet.support.CPUInformation;
|
|||||||
* @since 0.8.7
|
* @since 0.8.7
|
||||||
*/
|
*/
|
||||||
class VIAInfoImpl extends CPUIDCPUInfo implements VIACPUInfo {
|
class VIAInfoImpl extends CPUIDCPUInfo implements VIACPUInfo {
|
||||||
|
|
||||||
protected static boolean isC3Compatible = false;
|
private static boolean isC3Compatible;
|
||||||
protected static boolean isNanoCompatible = false;
|
private static boolean isNanoCompatible;
|
||||||
|
|
||||||
// If modelString != null, the cpu is considered correctly identified.
|
// If modelString != null, the cpu is considered correctly identified.
|
||||||
protected static String modelString = null;
|
private static final String smodel = identifyCPU();
|
||||||
|
|
||||||
|
|
||||||
public boolean IsC3Compatible(){ return isC3Compatible; }
|
public boolean IsC3Compatible(){ return isC3Compatible; }
|
||||||
|
|
||||||
public boolean IsNanoCompatible(){ return isNanoCompatible; }
|
public boolean IsNanoCompatible(){ return isNanoCompatible; }
|
||||||
|
|
||||||
static
|
|
||||||
{
|
|
||||||
identifyCPU();
|
|
||||||
}
|
|
||||||
|
|
||||||
public String getCPUModelString()
|
public String getCPUModelString()
|
||||||
{
|
{
|
||||||
if (modelString != null)
|
if (smodel != null)
|
||||||
return modelString;
|
return smodel;
|
||||||
throw new UnknownCPUException("Unknown VIA CPU; Family="+(CPUID.getCPUFamily() + CPUID.getCPUExtendedFamily())+", Model="+(CPUID.getCPUModel() + CPUID.getCPUExtendedModel()));
|
throw new UnknownCPUException("Unknown VIA CPU; Family="+CPUID.getCPUFamily() + '/' + CPUID.getCPUExtendedFamily()+
|
||||||
|
", Model="+CPUID.getCPUModel() + '/' + CPUID.getCPUExtendedModel());
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
public boolean hasX64()
|
public boolean hasX64()
|
||||||
{
|
{
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
private synchronized static void identifyCPU()
|
private static String identifyCPU()
|
||||||
{
|
{
|
||||||
if(CPUID.getCPUFamily() == 6){
|
// http://en.wikipedia.org/wiki/Cpuid
|
||||||
isC3Compatible = true; // Possibly not optimal
|
String modelString = null;
|
||||||
switch(CPUID.getCPUModel()){
|
int family = CPUID.getCPUFamily();
|
||||||
case 5:
|
int model = CPUID.getCPUModel();
|
||||||
modelString = "Cyrix M2";
|
if (family == 15) {
|
||||||
break;
|
family += CPUID.getCPUExtendedFamily();
|
||||||
case 6:
|
model += CPUID.getCPUExtendedModel() << 4;
|
||||||
modelString = "C5 A/B";
|
}
|
||||||
break;
|
|
||||||
case 7:
|
if (family == 6) {
|
||||||
modelString = "C5 C";
|
isC3Compatible = true; // Possibly not optimal
|
||||||
break;
|
switch (model) {
|
||||||
case 8:
|
case 5:
|
||||||
modelString = "C5 N";
|
modelString = "Cyrix M2";
|
||||||
break;
|
break;
|
||||||
case 9:
|
case 6:
|
||||||
modelString = "C5 XL/P";
|
modelString = "C5 A/B";
|
||||||
break;
|
break;
|
||||||
case 10:
|
case 7:
|
||||||
modelString = "C5 J";
|
modelString = "C5 C";
|
||||||
break;
|
break;
|
||||||
case 15:
|
case 8:
|
||||||
isNanoCompatible = true;
|
modelString = "C5 N";
|
||||||
modelString = "Nano";
|
break;
|
||||||
break;
|
case 9:
|
||||||
|
modelString = "C5 XL/P";
|
||||||
|
break;
|
||||||
|
case 10:
|
||||||
|
modelString = "C5 J";
|
||||||
|
break;
|
||||||
|
case 15:
|
||||||
|
isNanoCompatible = true;
|
||||||
|
modelString = "Nano";
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
modelString = "Via model " + model;
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
return modelString;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
14
history.txt
14
history.txt
@ -1,9 +1,23 @@
|
|||||||
2014-09-27 zzz
|
2014-09-27 zzz
|
||||||
|
* CPUID:
|
||||||
|
- Fix model and family calculations
|
||||||
|
- Fix most AMD family 15 IDs
|
||||||
|
- Add AMD Llano, Jaguar, Bulldozer 2
|
||||||
|
- Add Intel Ivy Bridge, Haswell, Broadwell, Penryn,
|
||||||
|
Pineview, Cedarview, Bay Trail, Avoton, and others
|
||||||
|
- Set best-guess capabilities for most Intel processors
|
||||||
|
- Supply best-guess model string in most cases
|
||||||
|
- Processors listed above, and some others, may see crypto speedups as a result
|
||||||
|
|
||||||
|
2014-09-26 zzz
|
||||||
* EdDSA: Use our PRNG by default for keygen
|
* EdDSA: Use our PRNG by default for keygen
|
||||||
* i2psnark:
|
* i2psnark:
|
||||||
- Increase default to 3 hops (ticket #966)
|
- Increase default to 3 hops (ticket #966)
|
||||||
- Show info hash on details page
|
- Show info hash on details page
|
||||||
* NetDB: Increase max age of RIs to reduce number refreshed after restart
|
* NetDB: Increase max age of RIs to reduce number refreshed after restart
|
||||||
|
* SAM:
|
||||||
|
- Don't publish LS for DIRECTION=CREATE
|
||||||
|
- Set default tunnel name
|
||||||
* Tests: Fix junit compile fails due to data structure moves
|
* Tests: Fix junit compile fails due to data structure moves
|
||||||
* Transport: Hooks for pluggable transports (ticket #1170)
|
* Transport: Hooks for pluggable transports (ticket #1170)
|
||||||
|
|
||||||
|
@ -18,7 +18,7 @@ public class RouterVersion {
|
|||||||
/** deprecated */
|
/** deprecated */
|
||||||
public final static String ID = "Monotone";
|
public final static String ID = "Monotone";
|
||||||
public final static String VERSION = CoreVersion.VERSION;
|
public final static String VERSION = CoreVersion.VERSION;
|
||||||
public final static long BUILD = 3;
|
public final static long BUILD = 4;
|
||||||
|
|
||||||
/** for example "-test" */
|
/** for example "-test" */
|
||||||
public final static String EXTRA = "";
|
public final static String EXTRA = "";
|
||||||
|
Reference in New Issue
Block a user